Please please please don’t obfuscate it! said a famous professor when I mentioned the outline of MIPSfpga, an exciting project part of the Imagination University Programme (IUP) I was working on at the time.
The journey from IP to real hardware
I’m a hardware guy by background. For me a tool is a solid object, usually a board with a processor in the middle. So when I arrived in the world of IP, it took some time to get used to the idea that a tool was a piece of software. It was also a challenge to get used to the idea of teaching computer architectures – how could people get so excited by a five stage pipeline and the purity of a RISC architecture?
Then I read the wonderful book Digital Design and Computer Architecture by Dr. David Harris and Dr. Sarah Harris. Here was something I could relate to: logic gates! And they led me gently into the concept of micro-architectures. Then it began to dawn on me, this MIPS stuff is really fundamental!
This is the story of how the new and exciting MIPSfpga programme from Imagination became reality.
I realized that if you wanted to teach real computer architectures, there are really only three available choices today. You could choose x86, but this has metamorphosed many times and has become quite complex for university students to understand; you could pick ARM, but that’s also become increasingly complex, and was arguably never true RISC in the first place. It’s also fraught with difficulties because the internal architecture is a fiercely guarded secret.
That leaves MIPS.
Invented at Stanford University, it has always been open to the extent that the original design was published, and an expert reading the wonderful Computer Architecture: A Quantitative Approach (written by Dr. John L. Hennessy and Dr. David A. Patterson) can understand how to build their own. Indeed, many have done: MIPS-like, MIPS-compatible and such phrases are frequently heard in academic circles.
Prof. John L. Hennessy (center) and his colleagues inspecting a MIPS chip layout in 1984
Imagination did (and still does) defend its intellectual property, but those that want to make their own MIPS CPU have flourished for over a decade; for example, one can find several open source MIPS simulators in the wild written by respectable universities.
However, what this highlighted to me as the non-expert observer was that we already had a thriving industry formed around teaching MIPS as the most elegant example of a RISC processor, supported by many implementations. I resolved to take it to the next level.
Presenting MIPSfpga to universities
I tried releasing a MIPS CPU to a university with almost immediate failure: It’s very complex. Can you give us training on it? Can we have a suitable hardware platform? Can you configure it for us? The design tools are very expensive, can you loan them to us?. Conclusion: all universities want a MIPS CPU, but for many a standard off-the-shelf package is just too difficult to use.
Therefore I spent most of 2014 consulting widely: San Francisco, Houston, Claremont, Munich, Southampton, Edinburgh, London, Southampton again, Newcastle, Tokyo, Seoul, Shanghai, Beijing, Hong Kong, Pune, Hyderabad. I asked many Universities: If we were to make a real MIPS CPU available for academic use, would it be useful to you? The response was unanimous: Yes! When can we have it?
The issue of obfuscation came up over and over again. Teachers explained to me why access to the real industrial RTL was so valuable to the education process. To me it was like a Swiss watch – if you let people take the back off, they could see how it works, but if the back was non-removable, it would just be a black-box with three hands and a winding knob. Interesting, but not educational. Obfuscation was for those with something to hide – I was convinced we had to go the non-obfuscated route.
You’ve been here for two months, and now you want to give our IP away!
The above was a memorable reaction when I first mooted my idea. But I thought we’ve got to give something if we are going to help universities. Nine months later, I secured approval for my plan from the executive board. I felt really good that day, and blessed that we have a CEO who understands my vision.
All we had to do now was to make this reality. I thought we’ve done the hard part, it should be easy now.
Have you any idea how difficult this is? I didn’t!
Picking a suitable MIPS CPUs, the software and the right tools
Firstly, which CPU to choose? Well, that was easier. I wanted microAptiv because it’s already in silicon (e.g. the Microchip PIC32MZ family of microcontrollers). It’s real – students touch it every day. But what about the configuration? There are tens of options!
For this, I did what I always do and let the voice of the academic be paramount. Professor David Harris of Harvey Mudd College did the configuration. He made a number of variants, but as his co-author, the indefatigable Professor Sarah Harris (University of Nevada, Las Vegas) started to develop teaching materials, it became clear that the microprocessor configuration (featuring an AHB-Lite memory interface and other useful blocks) was the way to go.
But there is so much that needs to go around such a CPU: the simulator, the choice of FPGA platforms, boot code, wrappers, the debug chain, JTAG probes, the development tools, access to C libraries… and on and on. It was a long journey and required a huge team effort.
Is it open source? Not completely. For academic users the license is simple: you can use it as you wish, but you cannot put it into silicon. If you modify it, you must talk to us first if you wish to patent the changes. In summary, universities can go as deep as they like under the hood.
Now that the MIPSfpga initiative is public, let me tell you what is available and what is coming:
- The getting started package includes the MIPS microAptiv CPU and all the other elements you need to get started. This includes a detailed guide that enables you to check the CPU is running on the FPGA and that you can program and debug it. The guide gives examples for the Terasic DE2-115 (Altera FPGA) platform and the Digilent Nexys4 DDR (Xilinx FPGA) platforms, although we are sure users will port it to many other platforms.
- Soon after the launch package, we will offer MIPSfpga Fundamentals – a complete set of teaching materials using the CPU.
- Then later MIPSfpga Advanced teaching materials will take things to a deeper level.
You may be wondering: can it run Linux? The answer is yes because the CPU includes the key elements that are required (e.g. an MMU), but this will take a little longer. There are still some extra IP blocks to be configured for the FPGA and software drivers that need to be written, but we are working on it.
The very first people to get their hands on MIPSfpga will be the attendees at the first Workshops at Harvey Mudd College on May 13th and 14th (more details at www.imgtec.com/MIPSfpga).
I’ve been involved in the University relations business for 21 years, but nothing has given me more satisfaction than this project, because I know that we are breaking new ground and doing something of genuine educational value.
I also know for sure that the value of Patterson and Hennessy’s elegantly designed MIPS RISC processor will live for another generation as the architecture of choice for those vital classes.
I’d like to thank Imagination for giving the opportunity to do something really important for education, I’d like to thank all the Universities who encouraged me to pursue this project, and I’d like to thank the team who made it possible, including people in Santa Clara, Portland and Austin in the US, in Kings Langley and Leeds in the UK, in Shanghai and in Pune.
I hope you enjoy going under the hood with MIPSfpga. If you would you like to use MIPSfpga, you can register your interest here and we will notify you when the download package is online.